Earlier methods for forming MOSFETs include amorphizing a contact area of a source/drain region of a transistor device, implanting, and forming a first layer of metal on the contact area.
Other earlier methods include using two different metals for two different contact area types such as p-FET and n-FET. This enables selective tuning of a silicide work-function for p-FET and n-FET contact areas. Such dual metal, dual silicide formation techniques provide selective Schottky barrier heights depending on a type of metal used to process each layered contact area. Other methods include using both multiple masks and different metals during the formation of a MOSFET to enable selective tuning of a first contact area and a second contact area.
Conventionally, nickel silicide (NiSi) has been employed for MOSFET contact areas. Titanium silicide (TiSi) improves manufacturing yields by eliminating or obviating nickel silicide (NiSi) pipes that, for example, lead to shorting and other performance issues. As such, TiSi has more recently been preferred for MOSFET manufacturing processes to account for smaller device scales. TiSi lags behind other materials, specifically, for p-FET performance, having a higher On-resistance (Ron) and a higher Schottky barrier height (SBH) to EV at the silicon or silicon germanium interface.
A need therefore exists for MOSFET manufacturing methods enabling the use of TiSi while minimizing manufacturing steps and materials and enhancing p-FET performance capability.